Title
Hardware instruction counting for log-based rollback recovery on x86-family processors
Abstract
Log-based recovery protocols enable process replicas in distributed systems to replay a computation up to the point where a previous computation failed. One fundamental assumption underlying these protocols is the piecewise deterministic (PWD) execution model, stating that recovery must not execute, but simulate the execution of nondeterministic events in order to maintain consistency. One such source of nondeterminism are asynchronous events triggering software signal handlers, an issue known to be solved by instruction counters. Efficient implementations in software have been shown to be practical, but require significant changes to applications and system software. Hardware counters, in contrast, allow running software unmodified. A number of processors implementing the Intel x86 instruction set architecture provide monitoring registers with properties similar to a true instruction counter. Designed for application profiling, these facilities reveal a number issues to be resolved when utilized for applications like the PWD model, which demands for a maximum in precision during replay. We discuss some of the most prominent problems faced when using performance counters for protocols satisfying the PWD model. We present additional hardware mechanisms, eliminating inconsistencies in counter interrupt delivery, based on standard processor debugging facilities, and at the expense of a small number of additionally generated exceptions.
Year
DOI
Venue
2006
10.1007/11955498_8
ISAS
Keywords
Field
DocType
number issue,system software,execution model,intel x86 instruction set,log-based recovery protocol,log-based rollback recovery,x86-family processor,hardware instruction,software signal handler,instruction counter,pwd model,true instruction counter,small number,satisfiability,instruction set architecture,distributed system
x86,Instruction set,Computer science,Program counter,Real-time computing,Software,Computer hardware,Interrupt,System software,Execution model,Operating system,Debugging,Embedded system
Conference
Volume
ISSN
ISBN
4328
0302-9743
3-540-68724-6
Citations 
PageRank 
References 
2
0.44
7
Authors
4
Name
Order
Citations
PageRank
Daniel Stodden1211.09
Hubert Eichner2263.23
Max Walter3549.17
Carsten Trinitis415129.80