Abstract | ||
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MultiProcessor Systems-on-Chip (MPSoC) are required to fulfill the performance demand of modern real-life embedded applications. For that purpose, Networks-on-Chip (NoC) are proposed as a promising solution to interconnection in MPSoCs for reasons of efficiency and scalability. In this scenario, the need to develop low-cost platforms to support NoC-based SoC design and verification is growing. In this work, the design of a low cost NoC-based MPSoC platform and its application to a video enhancement algorithm based on Super Resolution (SR) are presented. To validate the designed hardware platform, an optimized SR algorithm is mapped on the Processing Elements (PE) of the NoC-based SoC platform. Finally, the performance is characterized from experimental measurements according to the type of application, as well as the number of PE used. |
Year | Venue | Keywords |
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2013 | 2013 INTERNATIONAL CONFERENCE ON RECONFIGURABLE COMPUTING AND FPGAS (RECONFIG) | System-on-Chip, Network-on-Chip, MPSoC, FPGA, SuperResolution |
Field | DocType | ISSN |
Super resolution algorithm,Computer science,Parallel computing,Network on a chip,Multiprocessing,Real-time computing,Integrated circuit design,Interconnection,MPSoC,Image resolution,Embedded system,Scalability | Conference | 2325-6532 |
Citations | PageRank | References |
1 | 0.38 | 3 |
Authors | ||
3 |
Name | Order | Citations | PageRank |
---|---|---|---|
Garbi Singla | 1 | 1 | 0.38 |
Félix Tobajas | 2 | 41 | 9.57 |
Valentin de Armas | 3 | 9 | 3.35 |