Title
Algorithms and pipeline architectures for 2-D FFT and FFT-like transforms
Abstract
In this paper, efficient pipeline architectures that implement the 2-D FFT are presented. Based on the Vector Radix approach, the new structures alleviate the use of memory banks and the transposition of data of the row-column technique. Architectures for Vector Radix 2x2 algorithm and for a modified Vector Radix 4x4, called Vector Radix 2^2x2^2 algorithm, which has been devised and constructed from Vector Radix 2x2, are presented. These architectures can also be built from their 1-D counterparts. Thus, generic and parameterised architectures can be described using a hardware description language to implement both 1-D and 2-D FFTs. A comparison with row-column FFT architectures has shown that the proposed architectures can achieve a 50% reduction in complex multipliers usage. Furthermore, the suggested architectures are suitable to implement FFT-like transforms if the right type of arithmetic components is selected. In particular, they can be modified in order to implement Number Theoretic Transforms. In this case, a saving of up to 66% of registers and 50% of adders requirements of similar work in the literature can be achieved.
Year
DOI
Venue
2010
10.1016/j.dsp.2009.10.028
Digital Signal Processing
Keywords
Field
DocType
row-column technique,vector radix,1-d counterpart,pipeline architecture,vector radix algorithm,number theoretic transforms,modified vector radix,2-d ffts,ntt,2-d fft,adders requirement,vector radix approach,row-column fft architecture,hardware description language
Memory bank,Adder,Computer science,Parallel computing,Arithmetic,Algorithm,Radix,Fast Fourier transform,Hardware description language
Journal
Volume
Issue
ISSN
20
4
Digital Signal Processing
Citations 
PageRank 
References 
3
0.42
19
Authors
4
Name
Order
Citations
PageRank
Omar Nibouche18913.50
S. Boussakta213511.59
Michael Darnell37532.32
M. Benaissa430.42