Name
Abstract | ||
|---|---|---|
We present a countermeasure for protecting modular exponentiations against side-channel attacks such as power, timing or cache analysis. Our countermeasure is well-suited for tamper-resistant implementations of RSA or DSA, without significant penalty in terms of speed compared to commonly implemented methods. Thanks to its high efficiency and flexibility, our method can be implemented on various platforms, from smartcards with low-end processors to high-performance servers. |
Year | DOI | Venue |
|---|---|---|
2006 | 10.1007/11767480_18 | ACNS |
Keywords | Field | DocType |
side channel attack,significant penalty,modular exponentiation,cache analysis,side-channel attack,various platform,high-performance server,high efficiency,tamper-resistant implementation,low-end processor,flexible exponentiation,tamper resistance,side channel attacks,smartcard | Computer security,Cache,CPU cache,Computer science,Cryptography,Server,Fault tolerance,Electronic countermeasure,Side channel attack,Modular design,Embedded system | Conference |
Volume | ISSN | ISBN |
3989 | 0302-9743 | 3-540-34703-8 |
Citations | PageRank | References |
7 | 0.51 | 12 |
Authors | ||
2 | ||
Name | Order | Citations | PageRank |
|---|---|---|---|
| Camille Vuillaume | 1 | 90 | 10.61 |
| Katsuyuki Okeya | 2 | 447 | 38.47 |