Title
DDR3 based lookup circuit for high-performance network processing
Abstract
Double Data Rate (DDR) SDRAMs have been prevalent in the PC memory market in recent years and are widely used for networking systems. These memory devices are rapidly developing, with high density, high memory bandwidth and low device cost. However, because of the high-speed interface technology and complex instruction-based memory access control, a specific purpose memory controller is necessary for optimizing the memory access trade off. In this paper, a specific purpose DDR3 controller for high-performance table lookup is proposed and a corresponding lookup circuit based on the Hash-CAM approach is presented.
Year
DOI
Venue
2009
10.1109/SOCCON.2009.5398024
SoCC
Keywords
Field
DocType
specific purpose memory controller,ddr3 based lookup circuit,high-performance network processing,high-speed interface technology,storage management,pc memory,double data rate sdram,complex instruction-based memory access control,memory access optimization,dram chips,integrated circuit design,memory device,hash-cam approach,device cost,memory architecture,memory bandwidth,content-addressable storage,table lookup,double data rate
Registered memory,Semiconductor memory,Interleaved memory,Extended memory,Computer science,Memory map,Computer hardware,Computer memory,Memory controller,Embedded system,Memory refresh
Conference
ISBN
Citations 
PageRank 
978-1-4244-4941-5
0
0.34
References 
Authors
4
4
Name
Order
Citations
PageRank
Xin Yang1224.91
Sakir Sezer2101084.22
John V. McCanny340259.88
Dwayne Burns4173.97