Name
Title | ||
|---|---|---|
Design and Implementation of an Embedded Coprocessor with Native Support for 5D, Quadruple-Based Clifford Algebra |
Abstract | ||
|---|---|---|
Geometric or Clifford algebra (CA) is a powerful mathematical tool that offers a natural and intuitive way to model geometric facts in a number of research fields, such as robotics, machine vision, and computer graphics. Operating in higher dimensional spaces, its practical use is hindered, however, by a significant computational cost, only partially addressed by dedicated software libraries and hardware/software codesigns. For low-dimensional algebras, several dedicated hardware accelerators and coprocessing architectures have been already proposed in the literature. This paper introduces the architecture of CliffordALU5, an embedded coprocessing core conceived for native execution of up to 5D CA operations. CliffordALU5 exploits a novel, hardware-oriented representation of the algebra elements that allows for faster execution of Clifford operations. In this paper, a prototype implementation of a complete system-on-chip (SOC) based on CliffordALU5 is presented. This prototype integrates an embedded processing soft-core based on the PowerPC 405 and a CliffordALU5 coprocessor on a Xilinx XUPV2P Field Programmable Gate Array (FPGA) board. Test results show a $(5{\times})$ average speedup for 4D Clifford products and a $(4{\times})$ average speedup for 5D Clifford products against the same operations in Gaigen 2, a CA software library generator running on the general-purpose PowerPC processor. This paper also presents an execution analysis of three different applications in three diverse domains, namely, inverse kinematics of a robot, optical motion capture, and raytracing, showing an average speedup between $(3{\times})$ and $(4{\times})$ with respect to the baseline Gaigen 2 implementation. Finally, a multicore approach to higher dimensional CA based on CliffordALU5 is discussed. |
Year | DOI | Venue |
|---|---|---|
2013 | 10.1109/TC.2012.225 | IEEE Trans. Computers |
Keywords | Field | DocType |
average speedup,ca operation,clifford operation,cliffordalu5 coprocessor,clifford algebra,ca software library generator,quadruple-based clifford algebra,faster execution,dedicated software library,clifford product,execution analysis,native support,system on chip,computational modeling,computer architecture,algebra,field programmable gate arrays,embedded systems,computational geometry,coprocessors | Clifford algebra,System on a chip,Computer science,Parallel computing,Field-programmable gate array,Software,Coprocessor,Multi-core processor,PowerPC,Speedup | Journal |
Volume | Issue | ISSN |
62 | 12 | 0018-9340 |
Citations | PageRank | References |
4 | 0.46 | 4 |
Authors | ||
5 | ||
Name | Order | Citations | PageRank |
|---|---|---|---|
| Silvia Franchini | 1 | 33 | 5.12 |
| Antonio Gentile | 2 | 63 | 10.63 |
| Filippo Sorbello | 3 | 218 | 29.48 |
| Giorgio Vassallo | 4 | 122 | 21.04 |
| Salvatore Vitabile | 5 | 444 | 60.03 |