Title
Formal Verification and Hardware Design with Statecharts
Abstract
Statecharts extend the concept of Mealy Machines by parallel composition, hierarchy, and broadcast communication. While Statecharts in principle are widely accepted in industry, some semantical concepts, especially broadcasting, are still contested. In this contribution, we present a Statechart dialect that includes the basic concepts of the language and present a formal, relational semantics for it. We show that this semantics can be used for both formal verification by model checking and hardware synthesis.
Year
DOI
Venue
1998
10.1007/3-540-49254-2_11
Prospects for Hardware Foundations
Keywords
Field
DocType
semantical concept,hardware design,hardware synthesis,basic concept,parallel composition,broadcast communication,model checking,relational semantics,statechart dialect,formal verification,mealy machines
Formal equivalence checking,Model checking,Programming language,Kripke semantics,Intelligent verification,Computer science,State diagram,Formal methods,Semantics,Formal verification
Conference
Volume
ISSN
ISBN
1546
0302-9743
3-540-65461-5
Citations 
PageRank 
References 
0
0.34
20
Authors
2
Name
Order
Citations
PageRank
Jan Philipps116216.45
Peter Scholz220.75