Name
Abstract | ||
|---|---|---|
SCI is a new IEEE standard for supporting memory-shared parallelism. It is the only such interconnection interface that integrates cache coherency, scalability and is a standard [1]. Articles yet published about SCI are either too general to be really helpful for the actual designer [3], or only focus on a single aspect of the network, for example simulation of performances [4]. In this paper, we try give the designer who would implement an SCI system an overview as synthetical as possible, but yet accurate and useful. We will sucessively review the low level protocol, then the frame level and the coherency level. We conclude by discussing performances and comparing throughput with other high-speed networks. |
Year | DOI | Venue |
|---|---|---|
1993 | 10.1016/0165-6074(93)90133-6 | Microprocessing and Microprogramming |
Keywords | DocType | Volume |
practical consideration,SCI network | Journal | 38 |
Issue | ISSN | Citations |
1 | Microprocessing and Microprogramming | 0 |
PageRank | References | Authors |
0.34 | 2 | 3 |
Name | Order | Citations | PageRank |
|---|---|---|---|
| Vincent Habchi | 1 | 0 | 0.34 |
| Ulrich Finger | 2 | 5 | 2.16 |
| Ciaran O'Donnell | 3 | 4 | 2.33 |