Title
A 60-Ghz Phase-Locked Loop With Inductor-Less Wide Operation Range Prescaler In 90-Nm Cmos
Abstract
A 60-GHz phase-locked loop (PLL) with an inductor-less prescaler is fabricated in a 90-nm CMOS process. The inductor-less prescaler has a smaller chip area than previously reported ones. The PLL operates from 61 to 63 GHz and consumes 78 mW from a 1.2 V supply. The phase noise at 100 kHz and 1 MHz offset from carrier are -72 and -80 dBc/Hz, respectively. The prescaler occupies 80 x 40 mu m(2). The active area of the PLL is 0.31 mm(2).
Year
DOI
Venue
2009
10.1587/transele.E92.C.785
IEICE TRANSACTIONS ON ELECTRONICS
Keywords
Field
DocType
PLL, synthesizer, VCO, ILFD, phase noise
Phase-locked loop,Frequency divider,Dual-modulus prescaler,PLL multibit,Phase noise,Inductor,CMOS,Voltage-controlled oscillator,Electronic engineering,Engineering
Journal
Volume
Issue
ISSN
E92C
6
1745-1353
Citations 
PageRank 
References 
3
0.85
7
Authors
6
Name
Order
Citations
PageRank
Hiroaki Hoshino14511.54
Ryoichi Tachibana2101.96
Toshiya Mitomo37819.84
Naoko Ono4318.11
Yoshiaki Yoshihara55213.54
Ryuichi Fujimoto62414.44