Name
Abstract | ||
|---|---|---|
This paper presents the design of a novel architectural implementation of the LOCO-I compression scheme, the lossless/near-lossless algorithm used inside the JPEG-LS standard. Differently from what previously reported in literature, the proposed design fully exploits the sequential nature of the algorithm by means of a pipelined architecture, without modifications to the original compression scheme. The result is a good performance circuit well fitted for field-programmable gate-array realization, thus devised for application in the wearable computers and remote sensing domains. |
Year | DOI | Venue |
|---|---|---|
2009 | 10.1109/TVLSI.2008.2009188 | IEEE Trans. VLSI Syst. |
Keywords | Field | DocType |
loco-i compression scheme,sequential nature,pipelined architecture,novel architectural implementation,wearable computer,original compression scheme,loco-i compression algorithm,field-programmable gate-array realization,jpeg-ls standard,good performance circuit,proposed design,lossless compression,decoding,pipeline,compression algorithms,transform coding,field programmable gate array,compression algorithm,circuits,hardware,algorithm design and analysis,pipelines,wearable computers,field programmable gate arrays,remote sensing | Algorithm design,Computer science,Wearable computer,Field-programmable gate array,Transform coding,Electronic engineering,Decoding methods,Data compression,Computer hardware,Image compression,Lossless compression | Journal |
Volume | Issue | ISSN |
17 | 7 | 1063-8210 |
Citations | PageRank | References |
5 | 0.66 | 5 |
Authors | ||
2 | ||
Name | Order | Citations | PageRank |
|---|---|---|---|
| Pierantonio Merlino | 1 | 5 | 0.66 |
| Antonio Abramo | 2 | 17 | 2.63 |