Name
Abstract | ||
|---|---|---|
A compact (1 mm × 160 μm) and low-power (80-mW) 0.18-μm CMOS 3.125-Gb/s clock and data recovery circuit is described. The circuit utilizes injection locking to filter out high-frequency reference clock jitter and multiplying delay-locked loop duty-cycle distortions. The injection-locked slave oscillator output can have its output clocks interpolated by current steering the injecting clocks. A seco... |
Year | DOI | Venue |
|---|---|---|
2003 | 10.1109/JSSC.2003.818576 | IEEE Journal of Solid-State Circuits |
Keywords | DocType | Volume |
Clocks,Circuits,Injection-locked oscillators,Frequency,Jitter,Transceivers,Delay,Interpolation,Filtering,Tracking loops | Journal | 38 |
Issue | ISSN | Citations |
12 | 0018-9200 | 11 |
PageRank | References | Authors |
2.62 | 4 | 9 |
Name | Order | Citations | PageRank |
|---|---|---|---|
| Hiok-Tiaq Ng | 1 | 172 | 44.94 |
| Ramin Farjad-Rad | 2 | 193 | 58.77 |
| M.-J. E. Lee | 3 | 99 | 16.41 |
| William J. Dally | 4 | 11782 | 1460.14 |
| T. Greer | 5 | 11 | 2.62 |
| J. Poulton | 6 | 11 | 2.62 |
| J. H. Edmondson | 7 | 11 | 2.62 |
| R. Rathi | 8 | 51 | 9.70 |
| R. Sen | 9 | 11 | 2.62 |