Name
Abstract | ||
|---|---|---|
Field Programmable Gate Arrays (FPGAs) have been recently used as an effective platform for implementing many image/signal processing applications. MATLAB is one of the most popular languages to model image/signal processing applications. We present the MATCH compiler that takes MATLAB as input and produces a hardware in RTL VHDL, which can be mapped to an FPGA using commercial CAD tools. This dramatically reduces the time to implement an application on an FPGA. We present results on some image and signal processing algorithms for which hardware was synthesized using our compiler for the Xilinx XC4028 FPGA with an external memory. We also present comparisons with manually designed hardwares for the applications. Our results indicate that FPGA hardware can be generated automatically reducing the design time from days to minutes, with the tradeoff that the automatically generated hardware is 5 times slower than the manually designed hardware. |
Year | DOI | Venue |
|---|---|---|
2001 | 10.1109/ICVD.2001.902676 | VLSI Design |
Keywords | Field | DocType |
match compiler,signal processing application,signal processing algorithm,present comparison,fpga hardware,present result,xilinx xc4028 fpga,design time,fpga hardware synthesis,field programmable gate arrays,model image,hardware description languages,field programmable gate array,mathematical model,design automation,fpga,external memory,java,high level synthesis,signal processing | Signal processing,Computer science,High-level synthesis,Field-programmable gate array,FPGA prototype,Real-time computing,Compiler,VHDL,Embedded system,Reconfigurable computing,Hardware description language | Conference |
ISBN | Citations | PageRank |
0-7695-0831-6 | 12 | 1.38 |
References | Authors | |
1 | 5 | |
Name | Order | Citations | PageRank |
|---|---|---|---|
| Malay Haldar | 1 | 98 | 10.78 |
| Anshuman Nayak | 2 | 96 | 10.31 |
| Alok Choudhary | 3 | 12 | 1.38 |
| Prith Banerjee | 4 | 255 | 23.94 |
| Nagraj Shenoy | 5 | 12 | 1.38 |