Name
Abstract | ||
|---|---|---|
Nowadays networks-on-chip are emerging as a hot topic in IC designs with high integration. In addition to popular mesh and torus topologies, other structures can also be considered especially in 3D VLSI design. The shuffle-exchange topology is one of the popular interconnection architectures for multiprocessors due to its scalability and self-routing capability. By vertically stacking two or more silicon wafers, connected with a high-density and high-speed interconnect, it is now possible to combine multiple active device layers within a single IC. In this paper we propose an efficient three dimensional layout for a novel 2D mesh structure based on the shuffle-exchange topology. Simulation results show that by using the third dimension, performance and latency can be improved compared to the 2D VLSI implementation. |
Year | DOI | Venue |
|---|---|---|
2008 | 10.1109/I-SPAN.2008.23 | ISPAN |
Keywords | Field | DocType |
mesh structure,popular interconnection architecture,torus topology,popular mesh,shuffle-exchange topology,single ic,ic design,dimensional layout,vlsi design,vlsi implementation,shuffle-exchange mesh topology,silicon wafer,circuit topology,routing,soc,network on a chip,three dimensional,network topology,integrated circuit layout,network on chip,computer science,very large scale integration,vlsi,integrated circuit design | Integrated circuit layout,Mesh networking,Computer science,Parallel computing,Network on a chip,Network topology,Interconnection,Very-large-scale integration,Scalability,Topology (electrical circuits) | Conference |
ISSN | ISBN | Citations |
1087-4089 | 978-0-7695-3125-0 | 5 |
PageRank | References | Authors |
0.43 | 8 | 5 |
Name | Order | Citations | PageRank |
|---|---|---|---|
| Akbar Sharifi | 1 | 123 | 5.99 |
| Reza Sabbaghi-Nadooshan | 2 | 41 | 8.21 |
| Hamid Sarbazi-Azad | 3 | 949 | 103.28 |
| Sabbaghi-Nadooshan, R. | 4 | 5 | 0.43 |
| Sarbazi-Azad, H. | 5 | 13 | 2.64 |