Abstract | ||
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This paper presents an adaptive interface ASIC consisting of a low-noise analog front-end and a successive-approximation ADC. The entire analog signal processing chain is fully-differential for better immunity to common-mode noise and interferences. To make the interface adaptive to different biopotential signals, the bandwidth and gain of the analog front-end are configurable. The ADC is designed for rail-to-rail operation and the input full-scale is adjustable so that the resolution requirement can be relaxed. Fabricated in 0.18-mu m CMOS, 95-nV/root Hz input-referred noise density and more than 100-dB CMRR are obtained. Operating in 10-bit mode, the ADC exhibits -1/+0.3-LSB DNL and -1.3/+0.8-LSB INL for 1-V rail-to-rail input. The whole interface IC consumes 36 mu W from a single 1-V supply, making it suitable for a wide range of low-voltage and low-power biomedical applications. |
Year | DOI | Venue |
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2007 | 10.1109/ESSCIRC.2007.4430300 | Proceedings of the European Solid-State Circuits Conference |
Keywords | DocType | ISSN |
low power electronics,application specific integrated circuits,common mode,analog signal processing,low voltage | Conference | 1930-8833 |
Citations | PageRank | References |
4 | 0.57 | 1 |
Authors | ||
5 |
Name | Order | Citations | PageRank |
---|---|---|---|
Qiang Li | 1 | 81 | 21.66 |
Kuo Hwi Roy Tan | 2 | 4 | 0.57 |
Teo Tee Hui | 3 | 4 | 0.57 |
R. Singh | 4 | 4 | 0.91 |
T. Hui Teo | 5 | 9 | 3.07 |