Name
Abstract | ||
|---|---|---|
Nowadays high-performance multimedia SoC design always integrates a variety of function units (FU) into a single chip and these FUs impose great stress on the shared memory system. To improve the memory system utilization and meet a wide range of bandwidth and latency requirements of these FUs, a well-designed memory scheduler that takes the quality-of-service (QoS) into account must be adopted. In this paper, a laxity-aware memory scheduler that can adaptively measure the laxity of each memory access task is proposed. Known the laxity of each memory access task, the proposed memory scheduler can guarantee the necessary bandwidth within a certain time interval, which is crucial to the performance and user experience of multimedia SoCs. Compared to previous proposed memory scheduling algorithms based on bandwidth allocating, the laxity-aware memory scheduler can obtain 14.5% decrease in memory access latency while preserving high DRAM data bus utilization. |
Year | DOI | Venue |
|---|---|---|
2011 | 10.1109/CIT.2011.13 | CIT |
Keywords | Field | DocType |
laxity-aware memory,proposed memory scheduler,shared memory system,previous proposed memory scheduling,well-designed memory scheduler,necessary bandwidth,memory access latency,memory access task,laxity-aware memory scheduler,bandwidth allocating,memory system utilization,high performance multimedia soc,system on a chip,system on chip,scheduling,memory management,bandwidth,bandwidth allocation,quality of service | Registered memory,Uniform memory access,Physical address,Computer science,Computer network,Real-time computing,Memory management,Interleaved memory,Shared memory,Distributed shared memory,Flat memory model,Multimedia,Embedded system | Conference |
Citations | PageRank | References |
2 | 0.40 | 8 |
Authors | ||
4 | ||
Name | Order | Citations | PageRank |
|---|---|---|---|
| Guangfei Zhang | 1 | 20 | 2.97 |
| Yifei Jiang | 2 | 279 | 22.14 |
| Wenxiang Wang | 3 | 2 | 0.74 |
| Menghao Su | 4 | 14 | 3.16 |