Name
Abstract | ||
|---|---|---|
The results of expected performance analysis and simulation of three multiple processor Z-buffer architectures are presented. These architectures have been proposed as approaches to applying many processors, working in parallel, to the task of rapidly creating shaded raster images. These architectures are attractive since they offer potentially high performance, in terms of image update rate, at modest cost. All three approaches make use of multiple instances of identical processor modules. The analyses and simulations indicate that substantial gain is possible by applying multiple processors to the task. But, as more and more processors are added, additional gains in performance become smaller and smaller. This result suggests optimal system sizes. The performance of these architectures depends on the processors used, the number of processors, and certain characteristics of the image environments. Each architecture has its own performance characteristics and limitations. |
Year | DOI | Venue |
|---|---|---|
1980 | 10.1145/800250.807467 | SIGGRAPH '80 Proceedings of the 7th annual conference on Computer graphics and interactive techniques |
Keywords | Field | DocType |
image update rate,shaded raster image,image environment,multiple processor z-buffer architecture,multiple instance,high performance,own performance characteristic,multiple processor,multiple processor z-buffer system,identical processor module,expected performance analysis,frame buffer,bit map | Architecture,Raster graphics,Computer graphics (images),Computer science,Bitmap | Conference |
Volume | Issue | ISSN |
14 | 3 | 0097-8930 |
ISBN | Citations | PageRank |
0-89791-021-4 | 26 | 15.24 |
References | Authors | |
5 | 1 | |
Name | Order | Citations | PageRank |
|---|---|---|---|
| Frederic I. Parke | 1 | 115 | 114.12 |