Paper Info
Title
Finding heap-bounds for hardware synthesis
Abstract
Abstract—Dynamically allocated and manipulated data struc- tures cannot be translated into hardware unless there is an upper bound on the amount,of memory,the program,uses during all executions. This bound,can depend on the generic parameters to the program, i.e., program inputs that are instantiated at synthesis time. We propose a constraint based method,for the discovery of memory usage bounds, which leads to the first- known,C-to-gates hardware synthesis supporting programs with non-trivial use of dynamically allocated memory, e.g., linked lists maintained withmalloc,andfree. We illustrate the practicality of our tool on a range of examples. I. I NTRODUCTION C-to-gates synthesis promises to bring the power,of hard- ware based acceleration to mainstream,programmers,and to radically increase the productivity of digital designers [ 17]. However, today’s C-to-gates synthesis tools do not support one of the most powerful and widely used features of high-level programming,in C—dynamically,allocated data structures. Thus, with today’s tools we usually cannot synthesize gates from off-the-shelf C-based software. The support for dynamic memory,abstraction remains,an on-going research problem
Year
DOI
Venue
2009
10.1109/FMCAD.2009.5351120
FMCAD
Keywords
Field
DocType
digital design,shape,data structure,data mining,memory management,tree data structures,upper bound,artificial neural networks,hardware
Programming language,C dynamic memory allocation,Computer science,Upper and lower bounds,Heap (data structure),Theoretical computer science,Real-time computing,Memory management,Artificial neural network,Data structure,Linked list,Parallel computing,Tree (data structure)
Conference
Citations 
PageRank 
References 
16
0.73
22
Authors
7
Name
Order
Citations
PageRank
Byron Cook1563.93
Ashutosh Gupta219214.01
Stephen Magill3844.44
Andrey Rybalchenko4143968.53
Jiri Simsa5974.88
Satnam Singh657159.08
Viktor Vafeiadis794247.11