Title
On the Generation of Pseudo-Deterministic Two-Patterns Test Sequence with LFSRs
Abstract
Many Built-in Self Test (BIST) pattern generators use Linear Feedback Shift Registers (LFSR) to generate test sequences. In this paper, we address the generation of deterministic pairs of patterns for delay faults testing with LFSRs. A new synthesis procedure for a n-size LFSR is given and guarantees that a deterministic set of n precomputed test pairs is embedded in the maximal length pseudo-random test sequence of the LFSR. Sufficient and necessary conditions for the synthesis of this pseudo-deterministic LFSR are provided and show that at-speed delay faults testing becomes a reality without any additional cost for the LFSR. Moreover, since the theoretical properties of LFSRs are preserved, our method could be beneficially used in conjunction with any other technique proposed so far.
Year
DOI
Venue
1997
10.1109/EDTC.1997.582334
ED&TC
Keywords
Field
DocType
built-in self test,pseudo-deterministic two-patterns test sequence,maximal length pseudo-random test,new synthesis procedure,pseudo-deterministic lfsr,delay fault,n precomputed test pair,n-size lfsr,at-speed delay faults testing,deterministic pair,test sequence,linear feedback shift register,random testing,fault detection,pattern analysis,shift registers,logic design
Logic synthesis,Shift register,Linear feedback shift register,Matrix algebra,Logic testing,Computer science,Test sequence,Algorithm,Real-time computing,Electronic engineering,Self test,Built-in self-test
Conference
ISSN
ISBN
Citations 
1066-1409
0-8186-7786-4
16
PageRank 
References 
Authors
1.01
23
2
Name
Order
Citations
PageRank
Christian Dufaza1485.87
Yervant Zorian21994215.23