Paper Info
Title
A hardware processor supporting elliptic curve cryptography for less than 9 kGEs
Abstract
Elliptic Curve Cryptography (ECC) based processors have gained large attention in the context of embedded-system design due to their ability of efficient implementation. In this paper, we present a low-resource processor that supports ECC operations for less than 9 kGEs. We base our design on an optimized 16-bit microcontroller that provides high flexibility and scalability for various applications. The design allows the use of an optimized RAM-macro block and reduces the complexity by sharing various resources of the controller and the datapath. Our results improves the state of the art in low-resource $\mathbb{F}_{2^{163}}$ ECC implementations (14% less area needed compared to the best solution reported). The total size of the processor is 8,958 GEs for a 0.13 μ m CMOS technology and needs 285 kcycles for a point multiplication. It shows that the proposed solution is well suitable for low-power designs by providing a power consumption of only 3.2 μ W at 100 kHz.
Year
DOI
Venue
2011
10.1007/978-3-642-27257-8_12
CARDIS
Keywords
Field
DocType
various application,ecc implementation,optimized 16-bit microcontroller,embedded-system design,proposed solution,best solution,hardware processor,ecc operation,low-resource processor,low-power design,optimized ram-macro block,elliptic curve cryptography,embedded systems
Control theory,Datapath,Computer science,Parallel computing,Real-time computing,CMOS,Multiplication,Microcontroller,Elliptic curve cryptography,Scalability,Power consumption
Conference
Citations 
PageRank 
References 
10
0.51
21
Authors
2
Name
Order
Citations
PageRank
Erich Wenger117511.16
Michael Hutter234525.26