Name
Abstract | ||
|---|---|---|
The breakdown of 35Å and 70Å thick NMOS and PMOS silicon Gate oxides used in 1.8V and 3.3V BCD8 Smart Power technological node was investigated in this work. Both voltage to breakdown, from DC down to the ESD time domain, and time-dependent breakdown analysis have been carried out. We present also the evidence that breakdown is not affected by cumulative stress and it is mainly driven by voltage stress. |
Year | DOI | Venue |
|---|---|---|
2009 | 10.1016/j.microrel.2009.07.020 | Microelectronics Reliability |
Keywords | Field | DocType |
cumulant,time domain | NMOS logic,Electrostatic discharge,Voltage,Electronic engineering,Breakdown voltage,Time-dependent gate oxide breakdown,Gate oxide,Engineering,PMOS logic,Avalanche diode | Journal |
Volume | Issue | ISSN |
49 | 9 | 0026-2714 |
Citations | PageRank | References |
0 | 0.34 | 0 |
Authors | ||
4 | ||
Name | Order | Citations | PageRank |
|---|---|---|---|
| Augusto Tazzoli | 1 | 6 | 3.19 |
| L. Cerati | 2 | 1 | 1.50 |
| A. Andreini | 3 | 0 | 0.34 |
| Gaudenzio Meneghesso | 4 | 67 | 38.27 |