Title
Design of a static MIMD data flow processor using micropipelines
Abstract
Control-flow machines are sequential in nature, executing instructions in sequence through control of program counters, whereas data-flow machines execute instructions only as input operands are made available, a process directed at the parallelism inherent within programs. At the architecture level, data-flow machines execute instructions asynchronously. In contrast, at the implementation level, the synchronous design framework of computer systems which employs globally clocked timing discipline has reached its design limits owing to problems of clock distribution. Therefore, renewed interest has been expressed in the design of computer systems based upon an asynchronous (or self-timed) approach free of the discipline imposed by the global clock. Thus, the design of a static MIMD data-flow processor using micropipelines is presented. The implemented processor, or the micro data-flow processor, differs from processors previously reported insofar as the micro data-flow processor is wholly asynchronous at both the architectural and the implementation levels.
Year
DOI
Venue
1995
10.1109/92.406995
IEEE Trans. VLSI Syst.
Keywords
Field
DocType
architecture level,clocked timing discipline,static mimd data-flow processor,computer system,micro data-flow processor,data-flow machine,static mimd data flow,instructions asynchronously,implementation level,clock distribution,synchronous design framework,control flow,computer architecture,out of order,micro data,data flow,program counter,hardware,distributed computing,hazards,parallel processing,pipelines,vlsi
Instructions per cycle,Asynchronous communication,Architecture,Computer science,Operand,Parallel computing,Real-time computing,Very-large-scale integration,Out-of-order execution,Data flow diagram,MIMD,Embedded system
Journal
Volume
Issue
ISSN
3
3
1063-8210
Citations 
PageRank 
References 
1
0.40
10
Authors
2
Name
Order
Citations
PageRank
Chihming Chang1152.35
Shih-Lien Lu295867.34