Name
Title | ||
|---|---|---|
A multi-level routing scheme and router architecture to support hierarchical routing in large network on chip platforms |
Abstract | ||
|---|---|---|
The concept of hierarchical networks is useful for designing a large heterogeneous NoC by reusing predesigned small NoCs as subnets. In this paper we show that multi-level addressing is a cost-effective implementation option for hierarchical deadlock-free routing. We propose a 2-level routing scheme, which is not only efficient, but also enables co-existence of algorithmic and table-based implementation in one router. Synthesis results show that a 2- level hierarchical router design for an 8x8 NoC, can reduce area and power requirements by up to ∼20%, as compared to a router for the flat network. This work also proposes a new possibility for increasing the number of nodes available for subnet-to-subnet interfaces. Communication performance is evaluated for various subnet interface set-ups and traffic situations. |
Year | Venue | Keywords |
|---|---|---|
2010 | Euro-Par Workshops | cost-effective implementation option,table-based implementation,2-level routing scheme,chip platform,hierarchical network,hierarchical deadlock-free routing,large heterogeneous noc,hierarchical routing,communication performance,multi-level routing scheme,level hierarchical router design,router architecture,new possibility,flat network,large network,computer engineering |
Field | DocType | Volume |
Hierarchical routing,Policy-based routing,Computer science,Static routing,Parallel computing,Computer network,Core router,Router,Routing table,Metrics,One-armed router,Distributed computing | Conference | 6586 |
ISSN | Citations | PageRank |
0302-9743 | 2 | 0.36 |
References | Authors | |
9 | 3 | |
Name | Order | Citations | PageRank |
|---|---|---|---|
| Rickard Holsmark | 1 | 249 | 13.10 |
| Shashi Kumar | 2 | 282 | 16.58 |
| Maurizio Palesi | 3 | 1119 | 78.82 |