Name
Abstract | ||
|---|---|---|
Phase change memory (PCM) is promising to become an alternative main memory thanks to its better scalability and lower leakage than DRAM. However, the long write latency of PCM puts it at a severe disadvantage against DRAM. In this paper, we propose a Dynamic Write Consolidation (DWC) scheme to improve PCM memory system performance while reducing energy consumption. This paper is motivated by the observation that a large fraction of a cache line being written back to memory is not actually modified. DWC exploits the unnecessary burst writes of unmodified data to consolidate multiple writes targeting the same row into one write. By doing so, DWC enables multiple writes to be send within one. DWC incurs low implementation overhead and shows significant efficiency. The evaluation results show that DWC achieves up to 35.7% performance improvement, and 17.9% on average. The effective write latency are reduced by up to 27.7%, and 16.0% on average. Moreover, DWC reduces the energy consumption by up to 35.3%, and 13.9% on average. |
Year | DOI | Venue |
|---|---|---|
2014 | 10.1145/2597652.2597661 | I4CS |
Keywords | Field | DocType |
performance optimization,phase change memory,system architectures,write consolidation | Dram,Phase-change memory,Latency (engineering),Computer science,CPU cache,Parallel computing,Real-time computing,Consolidation (soil),Energy consumption,Performance improvement,Scalability | Conference |
Citations | PageRank | References |
12 | 0.52 | 26 |
Authors | ||
6 | ||
Name | Order | Citations | PageRank |
|---|---|---|---|
| Fei Xia | 1 | 27 | 1.43 |
| Dejun Jiang | 2 | 138 | 12.84 |
| Jin Xiong | 3 | 157 | 15.95 |
| Ming-yu Chen | 4 | 902 | 79.29 |
| Lixin Zhang | 5 | 571 | 45.96 |
| SUN Ning-Hui | 6 | 1268 | 97.37 |