Paper Info
Title
An improved hierarchical classification algorithm for structural analysis of integrated circuits
Abstract
A new and efficient combination of signal tracing and block recognition techniques for circuit analysis is proposed. It utilizes the benefits of both approaches to solve problems such as signal flow or gate recognition. The analysis process is easily controlled by a user de- finable rule set where ports, nets and blocks are attrib- uted with types. After structural investigation a hierar- chical netlist is produced providing block information as subcircuits. As an important feature, the algorithm allows the handling of optional ports as well. Thus, this flexible approach is applicable to various circuit types and works on several abstraction levels. Classification Algorithm At several stages in a design flow the current status of a design has to be analyzed. This often requires a transfer to a higher abstraction level. In contrast to pre- vious methods ((1), (2), (3)), our pattern based classifi- cation approach extends a combination of block recog- nition with a new type assignment concept (4). Types are used for object classification. There are types for ports, nets and elements. Each of these objects can have an arbitrary set of types simultaneously. Each block rule contains a pattern of a circuit part to recog- nize (block) and a set of conclusions. They determine type assignments when a match is found. A user defined rule set controls the analysis process. It is composed of both type declarations and block rules. When a block rule matches, two actions are performed: First, appropriate conclusions are assigned and second, a subcircuit is inserted. This causes other blocks to meet the matching requirements as well. As an advantage of this procedure, an inserted subcircuit can again be re- used as a part of a matching block. Thereby, the circuit representation is restructured by inserting subcircuits and objects are classified by assigning types. Fig. 1 shows an example. Given an appropriate rule set, the analysis of the circuit a) will result in b). The resistor path is successively grouped, the inverter is recognized and signal direction is traced. The classifi- cation algorithm is able to work on any hierarchical netlist. We used the algorithm for the analysis of analog circuits as well. <out>
Year
DOI
Venue
2001
10.1145/367072.368006
DATE
Keywords
Field
DocType
improved hierarchical classification algorithm,structural analysis,integrated circuit,circuit analysis,signal analysis,logic design,analog circuits,classification algorithms,process control,resistors,system level design,design flow,structure analysis,algorithm design and analysis
Logic synthesis,Netlist,Computer science,Electronic system-level design and verification,Algorithm,OR gate,Network analysis,Integrated circuit,Tracing,Signal-flow graph
Conference
ISBN
Citations 
PageRank 
0-7695-0993-2
0
0.34
References 
Authors
2
3
Name
Order
Citations
PageRank
M. Olbrich1114.28
A. Rein200.34
Barke, E.36612.44