Title
How to Fake 1000 Registers
Abstract
Large numbers of logical registers can improve performance by allowing fast access to multiple subroutine contexts (register windows) and multiple thread contexts (multithreading). Support for both of these together requires a multiplicative number of registers that quickly becomes prohibitive. We overcome this limitation with the virtual context architecture (VCA), a new register-file architecture that virtualizes logical register contexts. VCA works by treating the physical registers as a cache of a much larger memorymapped logical register space. Complete contexts, whether activation records or threads, are no longer required to reside in their entirety in the physical register file. A VCA implementation of register windows on a single-threaded machine reduces data cache accesses by 20%, providing the same performance as a conventional machine while requiring one fewer cache port. Using VCA to support multithreading enables a four-thread machine to use half as many physical registers without a significant performance loss. VCA naturally extends to support both multithreading and register windows, providing higher performance with significantly fewer registers than a conventional machine.
Year
DOI
Venue
2005
10.1109/MICRO.2005.21
Barcelona
Keywords
Field
DocType
physical register file,four-thread machine,register windows,larger memorymapped logical register,vca implementation,logical register context,conventional machine,physical register,logical register,fewer register,multi threading,register file,multithreading,computer architecture
Multithreading,Computer science,Cache,Parallel computing,Register file,FLAGS register,Thread (computing),Register window,Memory type range register,Processor register,Operating system
Conference
ISSN
ISBN
Citations 
1072-4451
0-7695-2440-0
17
PageRank 
References 
Authors
0.71
20
4
Name
Order
Citations
PageRank
David W. Oehmke1170.71
Nathan Binkert288249.23
Trevor Mudge36139659.74
Steven K. Reinhardt43885226.69