Abstract | ||
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This paper presents a practical method to estimate IC product performance and parametric yield solely from a well-chosen set of existing electrical measurements intended for technology monitoring at an early stage of manufacturing. We demonstrate that the components of mmWave PLL and product-like logic performance in a 65 nm SOI CMOS technology are predicted within a 5% RMS error relative to mean. |
Year | DOI | Venue |
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2008 | 10.1109/CICC.2008.4672059 | CICC |
Keywords | Field | DocType |
process monitoring,cmos integrated circuits,integrated circuit technology,ic product yield,integrated circuit manufacture,ic product performance,mmwave pll,ic technology monitoring,phase locked loops,silicon-on-insulator,ic manufacturing,soi cmos technology,integrated circuit yield,product-like logic performance,millimetre wave devices,rms error,electrical measurements,ic technology benchmark,silicon on insulator,estimation,testing | Silicon on insulator,Phase-locked loop,Computer science,Electrical measurements,CMOS,Electronic engineering,Parametric statistics,Root-mean-square deviation,Frequency conversion,Soi cmos technology | Conference |
ISBN | Citations | PageRank |
978-1-4244-2019-3 | 1 | 0.39 |
References | Authors | |
3 | 5 |
Name | Order | Citations | PageRank |
---|---|---|---|
Choongyeun Cho | 1 | 40 | 6.76 |
Daeik D. Kim | 2 | 27 | 5.49 |
Jonghae Kim | 3 | 101 | 14.95 |
Daihyun Lim | 4 | 434 | 54.59 |
Sangyeun Cho | 5 | 1294 | 73.92 |