Abstract | ||
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A self-routing permutation network capable of routing all n factorial permutations of its n inputs to its n outputs is presented. The network implements the binary radix sorting on the structure of the generalized baseline network, a modified model of the original baseline network. The network has O(N log 3 N) hardware complexity and O(log3 N) delay time for N-inputs. The network makes use of the localized bit information instead of the global information in routing procedure. This strategy leads to the reduction of both the hardware and the delay time compared with other comparable networks. The resulting hardware is simple, and has a good regularity |
Year | DOI | Venue |
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1991 | 10.1109/ICDCS.1991.148728 | ICDCS |
Keywords | Field | DocType |
multiprocessor interconnection networks,hardware complexity,delay time,delays,computational complexity,binary radix sorting,bnb self-routing permutation network,n factorial permutations,generalized baseline network,concurrent computing,switches,hardware,national electric code,routing,computer networks,sorting,cellular networks | Computer science,Radix sort,Permutation,Factorial,Sorting,Cellular network,Concurrent computing,Binary number,Computational complexity theory,Distributed computing | Conference |
Citations | PageRank | References |
2 | 0.45 | 5 |
Authors | ||
2 |
Name | Order | Citations | PageRank |
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Sungchang Lee | 1 | 15 | 4.72 |
Mi Lu | 2 | 2 | 0.45 |