Title
Enabling Large-Scale Pervasive Logic Verification through Multi-Algorithmic Formal Reasoning
Abstract
Pervasive Logic is a broad term applied to the variety of logic present in hardware designs, yet not a part of their primary functionality. Examples of pervasive logic include initialization and self-test logic. Because pervasive logic is intertwined with the functionality of chips, the verification of such logic tends to require very deep sequential analysis of very large slices of the design. For this reason, pervasive logic verification has hitherto been a task for which formal algorithms were not considered applicable. In this paper, we discuss several pervasive logic verification tasks for which we have found the proper combination of algorithms to enable formal analysis. We describe the nature of these verification tasks, and the testbenches used in the verification process. We furthermore discuss the types of algorithms needed to solve these verification tasks, and the type of tuning we performed on these algorithms to enable this analysis.
Year
DOI
Venue
2006
10.1109/FMCAD.2006.12
FMCAD
Keywords
Field
DocType
pervasive logic verification,logic present,verification task,pervasive logic,deep sequential analysis,self-test logic,multi-algorithmic formal reasoning,verification process,formal algorithm,pervasive logic verification task,formal analysis,enabling large-scale pervasive logic,sequential analysis,chip,formal logic,formal verification
Computational logic,Automated reasoning,Functional verification,Computer science,Intelligent verification,Logic optimization,Description logic,Multimodal logic,Theoretical computer science,High-level verification
Conference
ISBN
Citations 
PageRank 
0-7695-2707-8
6
0.57
References 
Authors
19
8
Name
Order
Citations
PageRank
Tilman Glokler160.57
Jason Baumgartner231323.36
Devi Shanmugam360.57
Rick Seigler460.57
G. A. Van Huben5213.13
Barinjato Ramanandray660.57
Hari Mony718613.30
Paul Roessler860.57