Name
Abstract | ||
|---|---|---|
A 10Gb/s equalizer using both feedforward and decision-feedback equalization is designed for high speed serial-links. The chip is implemented in a standard 0.25 mu m SiGe BiCMOS technology with 50 GHz peak f(t), and packaged in a commercial LLP package. Using a 4-stage feedforward and 2-tap post-cursor cancellation, this equalizer achieves a total peak-to-peak jitter of 27ps and 33ps for 10" and 20" of copper traces on FR4, respectively. The transmitter uses NRZ signaling with no pre-emphasis. |
Year | DOI | Venue |
|---|---|---|
2007 | 10.1109/CICC.2007.4405734 | PROCEEDINGS OF THE IEEE 2007 CUSTOM INTEGRATED CIRCUITS CONFERENCE |
Keywords | Field | DocType |
decision-feedback, equalizer, serial-link, backplane communications | Serial communication,Transmitter,Equalizer,Equalization (audio),Computer science,Chip,Adaptive equalizer,Electronic engineering,Jitter,Feed forward | Conference |
Citations | PageRank | References |
2 | 0.85 | 0 |
Authors | ||
4 | ||
Name | Order | Citations | PageRank |
|---|---|---|---|
| Ali Kiaei | 1 | 2 | 0.85 |
| Babak Matinpour | 2 | 2 | 0.85 |
| Ahmad Bahai | 3 | 602 | 65.90 |
| Thomas H. Lee | 4 | 2188 | 755.99 |