Title
Towards a Universal FPGA Matrix-Vector Multiplication Architecture
Abstract
We present the design and implementation of a universal, single-bit stream library for accelerating matrix-vector multiplication using FPGAs. Our library handles multiple matrix encodings ranging from dense to multiple sparse formats. A key novelty in our approach is the introduction of a hardware-optimized sparse matrix representation called Compressed Variable-Length Bit Vector (CVBV), which reduces the storage and bandwidth requirements up to 43% (on average 25%) compared to compressed sparse row (CSR) across all the matrices from the University of Florida Sparse Matrix Collection. Our hardware incorporates a runtime-programmable decoder that performs on-the-fly-decoding of various formats such as Dense, COO, CSR, DIA, and ELL. The flexibility and scalability of our design is demonstrated across two FPGA platforms: (1) the BEE3 (Virtex-5 LX155T with 16GB of DRAM) and (2) ML605 (Virtex-6 LX240T with 2GB of DRAM). For dense matrices, our approach scales to large data sets with over 1 billion elements, and achieves robust performance independent of the matrix aspect ratio. For sparse matrices, our approach using a compressed representation reduces the overall bandwidth while also achieving comparable efficiency relative to state-of-the-art approaches.
Year
DOI
Venue
2012
10.1109/FCCM.2012.12
FCCM
Keywords
Field
DocType
multiple sparse format,state-of-the-art approach,approach scale,sparse matrix,dense matrix,matrix aspect ratio,universal fpga matrix-vector multiplication,multiple matrix,hardware-optimized sparse matrix representation,sparse row,bandwidth requirement,matrix multiplication,fpga,reconfigurable computing,field programmable gate arrays
Dram,Computer science,Matrix (mathematics),Parallel computing,Multiplication,Bit array,Matrix multiplication,Sparse matrix,Scalability,Reconfigurable computing
Conference
Citations 
PageRank 
References 
22
1.36
16
Authors
3
Name
Order
Citations
PageRank
Srinidhi Kestur11379.47
John D. Davis2111054.37
Eric S. Chung364738.01