Name
Abstract | ||
|---|---|---|
In code division multiple access (CDMA) systems the base station identifies each user in a cell by unique orthogonal (Walsh) codes. The Walsh codes are generated at the transmitter using a Walsh-Hadamard function. A Fast Hadamard Transformer (FHT) is used at the receiver to decode the transmitted codes. The purpose of this study is to design a FHT which utilizes less hardware resources as compared to the existing designs and also suggest means for reducing the input length of the Walsh sequence. Our study results indicate that the FHT design using 16-chip sequence achieves 90% reduction in hardware resources (equivalent gate count) as compared to the design which uses 256-chip sequence. Also, the maximum frequency of operation of the 16-chip FHT (35.679 MHz) is more than double as compared to the 256-chip FHT (16.025 MHz). |
Year | DOI | Venue |
|---|---|---|
2003 | 10.1145/611817.611853 | FPGA |
Keywords | Field | DocType |
walsh sequence,walsh code,hardware resource,256-chip sequence,existing design,fast hadamard transformer,16-chip fht,16-chip sequence,256-chip fht,study result,fht design,fpga implementation,code division multiple access,chip,fft,base station,matrix multiplicaiton,fpga | Transmitter,Base station,Gate count,Computer science,Field-programmable gate array,Real-time computing,Fast Fourier transform,Code division multiple access,Hadamard transform,Hadamard code | Conference |
ISBN | Citations | PageRank |
1-58113-651-X | 1 | 0.38 |
References | Authors | |
0 | 2 | |
Name | Order | Citations | PageRank |
|---|---|---|---|
| Sanat Kamal Bahl | 1 | 5 | 1.35 |
| Jim Plusquellic | 2 | 546 | 53.16 |