Title
Highly scalable barriers for future high-performance computing clusters
Abstract
Although large scale high performance computing today typically relies on message passing, shared memory can offer significant advantages, as the overhead associated with MPI is completely avoided. In this way, we have developed an FPGA-based Shared Memory Engine that allows to forward memory transactions, like loads and stores, to remote memory locations in large clusters, thus providing a single memory address space. As coherency protocols do not scale with system size we completely avoid a global coherency across the cluster. However, we maintain local coherency domains, thus keeping the cores within one node coherent. In this paper, we show the suitability of our approach by analyzing the performance of barriers, a very common synchronization primitive in parallel programs. Experiments in a real cluster prototype show that our approach allows synchronization among 1024 cores spread over 64 nodes in less than 15us, several times faster than other highly optimized barriers. We show the feasibility of this approach by executing a shared-memory implementation of FFT. Finally, note that this barrier can also be leveraged by MPI applications running on our shared memory architecture for clusters. This ensures the usefulness of this work for applications already written.
Year
DOI
Venue
2011
10.1109/HiPC.2011.6152729
HiPC
Keywords
Field
DocType
global coherency,real cluster prototype show,single memory address space,memory transaction,shared memory,scalable barrier,coherency protocol,remote memory location,mpi application,shared memory architecture,future high-performance computing cluster,local coherency domain,distributed shared memory,synchronization,engines,field programmable gate arrays,parallel programming,computer architecture,message passing,protocols,fast fourier transforms
Interleaved memory,Uniform memory access,Shared memory,Computer science,Parallel computing,Distributed memory,Memory address,Distributed shared memory,Memory architecture,Distributed computing,Scalability
Conference
Citations 
PageRank 
References 
0
0.34
0
Authors
5
Name
Order
Citations
PageRank
Holger Froning131.85
Alexander Giese2292.84
Hector Montaner331.51
Federico Silla457656.77
Jose Duato589354.65