Name
Title | ||
|---|---|---|
Modeling multi-threaded architectures in PAMELA for real-time high performance applications. |
Abstract | ||
|---|---|---|
In this paper we present a method to explore thedesign space of multi-threaded architectures using thePamela [3] modeling language. The domain of applications we consider is digital signal processing (DSP),where high performance is derived by exploiting bothfine grain and coarse grain parallelism in the application. The modeling scheme takes an unified viewof both fine grain and coarse grain parallelism in agiven application to performance meter the architecture. The application - written using a high level language, is compiled, and a trace generated for benchmark data in terms of the instruction set architectureof the processor. The generated trace is for a singleuni-threaded, uni-processor system. This trace is preprocessed and retargetted to generate multi-threadedarchitecture specific PAMELA code. Using a material-oriented approach, the resulting Pamela code is executed to evaluate various architecture options over theentire design space iteratively, subject to implementation constraints. We demonstrate the suitability andsimplicity of the approach with an example. |
Year | DOI | Venue |
|---|---|---|
1997 | 10.1109/HIPC.1997.634522 | HiPC |
Keywords | Field | DocType |
high performance,multi-threaded architecture,bothfine grain,high level language,fine grain,agiven application,pamela code,multi-threaded architectures,modeling scheme,coarse grain parallelism,material-oriented approach,real-time high performance applications,real time,space exploration,signal processing,computational modeling,computer architecture,virtual machines,parallel processing,real time systems,instruction set architecture,performance measurement,concurrent computing,space technology,digital signal processing,process algebra,instruction sets,design optimization | Signal processing,Digital signal processing,Computer architecture,Architecture,Virtual machine,Computer science,Instruction set,Parallel computing,Modeling language,Supercomputer Education Research Centre,Process calculus,Distributed computing | Conference |
ISBN | Citations | PageRank |
0-8186-8067-9 | 4 | 0.49 |
References | Authors | |
2 | 3 | |
Name | Order | Citations | PageRank |
|---|---|---|---|
| S. Balakrishnan | 1 | 22 | 4.66 |
| S. K. Nandy | 2 | 320 | 50.83 |
| Arjan J. C. van Gemund | 3 | 1009 | 70.56 |