Paper Info
Title
Security camera based on a single chip solution using a sharply outlined display algorithm and variable-clock video encoder
Abstract
In this paper, we have proposed a security camera system that displays high-definition images by using a sharply outlined display algorithm (SODA), which generates less hardware complexity because of a modified video encoder. While the proposed system uses a charge coupled device (CCD) with a complementary filter that may cause some problems in representing vivid color, we have been able to resolve the problem by mixing two signals, such as those generated by chrominance and luminance processes. In doing so, the system requires the use of a video encoder that converts the CCD's output signals into a composite video baseband signal (CVBS). Moreover, although a video encoder generally operates at 27 MHz the CCD module used in the security camera requires a particular clock frequency. Here, we have proposed that the new video encoder uses a clock to equal the CCD module at a given frequency. In doing so, the system using the encoder reduces hardware complexity and noise. The proposed system is fabricated with a test camera chip that has been manufactured by the MagnaChip 0.25 μm CMOS process.
Year
DOI
Venue
2006
10.1109/TCE.2006.1605061
IEEE Trans. Consumer Electronics
Keywords
Field
DocType
Security,Cameras,Displays,Charge coupled devices,Hardware,Charge-coupled image sensors,Clocks,Frequency,High definition video,Filters
Video capture,Computer science,Electronic engineering,Artificial intelligence,Composite video,Computer vision,Video processing,S-Video,Chrominance,Algorithm,Encoder,Clock rate,Three-CCD camera
Journal
Volume
Issue
ISSN
52
1
0098-3063
Citations 
PageRank 
References 
1
0.63
7
Authors
5
Name
Order
Citations
PageRank
Joohyun Kim129222.75
Jooyoung Ha232.15
Shinki Jeong310.63
Hoongee Yang4136.12
Bong-Soon Kang54416.86