Title
A Practical Method for Testing High-Speed Networking Hardware Architectures
Abstract
This paper deals with the key issues encountered in testing during the development of high-speed networking hardware systems by documenting a practical method for "real-life like" testing. The proposed method is empowered by modern and commonly available Field Programmable Gate Array (FPGA) technology. Innovative application of standard FPGA blocks in combination with reconfigurability are used as a back-bone of the method. A detailed elaboration of the method is given so as to serve as a general reference. The method is fully characterised and compared to alternatives through a case study proving it to be the most efficient and effective one at a reasonable cost.
Year
DOI
Venue
2009
10.1109/ICNS.2009.50
Valencia
Keywords
Field
DocType
high-speed networking hardware system,standard fpga block,practical method,detailed elaboration,innovative application,available field programmable gate,testing high-speed networking hardware,key issue,case study,general reference,field programmable gate array,networking hardware,field programmable gate arrays,testing,fpga,local area networks,system testing,application specific integrated circuits,test,computer architecture,hardware,hardware architecture,prototypes
Reconfigurability,System testing,Logic testing,Computer science,Networking hardware,Ethernet lan,Field-programmable gate array,Application-specific integrated circuit,Local area network,Embedded system
Conference
ISBN
Citations 
PageRank 
978-0-7695-3586-9
1
0.36
References 
Authors
12
4
Name
Order
Citations
PageRank
Vukasin Pejovic131.79
Slobodan Bojanic2727.91
Carlos Carreras314517.22
Atta Badii410024.53