Title
Population Studies for the Gate Matrix Layout Problem
Abstract
This paper addresses a Very Large Scale Integrated (VLSI) design problem that belongs to the NP-hard class. The Gate Matrix Layout problem has strong applications on the chip-manufacturing industry. A Memetic Algorithm is employed to solve a set of benchmark instances, present in previous works in the literature. Beyond the results found for these instances, another goal of this paper is to study how the use of multiple populations and different migration strategies affects the algorithm's performance. This comparison has shown to be fruitful, sometimes producing a strong performance improvement over single population approaches.
Year
Venue
Keywords
2002
IBERAMIA
benchmark instance,np-hard class,memetic algorithm,population studies,strong application,gate matrix layout problem,design problem,large scale integrated,chip-manufacturing industry,strong performance improvement,different migration strategy,manufacturing industry,population study,vlsi design,chip
Field
DocType
Volume
Memetic algorithm,Population,Very large scale integrated,Evolutionary algorithm,Matrix (mathematics),Computer science,Theoretical computer science,Artificial intelligence,Very-large-scale integration,Performance improvement,Distributed computing
Conference
2527
ISSN
ISBN
Citations 
0302-9743
3-540-00131-X
1
PageRank 
References 
Authors
0.35
5
4
Name
Order
Citations
PageRank
Alexandre Mendes116318.23
Paulo França2111.45
Pablo Moscato333437.27
Vinícius Garcia4152.23