Name
Abstract | ||
|---|---|---|
A concurrent design and evaluation environment for an FPGA and its CAD system is presented. By describing an FPGA architecture in a description language, the user can evaluate it, e.g., switch pattern in a switch box and routing resource balance. In addition, this environment has a middle-ware which enables users to develop dedicated CAD systems rapidly. While they are evaluating their FPGAs, they can obtain original CAD tool sets before the FPGAs are manufactured. This is the best way to realize a well-balanced FPGA and its CAD system. This paper overviews the system and introduces some examples. |
Year | DOI | Venue |
|---|---|---|
1996 | 10.1007/3-540-61730-2_4 | FPL |
Keywords | Field | DocType |
co-evaluation environment,fpga architecture,cad system | Cad tools,Concurrent engineering,Computer science,Parallel computing,FPGA prototype,Field-programmable gate array,Logic block,Fpga architecture,Cad system,Reconfigurable computing,Embedded system | Conference |
ISBN | Citations | PageRank |
3-540-61730-2 | 4 | 0.64 |
References | Authors | |
5 | 4 | |
Name | Order | Citations | PageRank |
|---|---|---|---|
| Toshiaki Miyazaki | 1 | 241 | 42.14 |
| Akihiro Tsutsui | 2 | 38 | 9.26 |
| Kenji Ishii | 3 | 4 | 1.32 |
| Naohisa Ohta | 4 | 102 | 22.69 |