Paper Info
Title
Techniques and tools for implementing IEEE 754 floating-point arithmetic on VLIW integer processors
Abstract
Recently, some high-performance IEEE 754 single precision floating-point software has been designed, which aims at best exploiting some features (integer arithmetic, parallelism) of the STMicroelectronics ST200 Very Long Instruction Word (VLIW) processor. We review here the techniques and software tools used or developed for this design and its implementation, and how they allowed very high instruction-level parallelism (ILP) exposure. Those key points include a hierarchical description of function evaluation algorithms, the exploitation of the standard encoding of floating-point data, the automatic generation of fast and accurate polynomial evaluation schemes, and some compiler optimizations.
Year
DOI
Venue
2010
10.1145/1837210.1837212
PASCO
Keywords
Field
DocType
floating-point arithmetic,single precision floating-point software,high instruction-level parallelism,compiler optimizations,software tool,accurate polynomial evaluation scheme,floating-point data,stmicroelectronics st200,automatic generation,long instruction word,function evaluation algorithm,vliw integer processor,code generation,very long instruction word,compiler optimization,ieee 754,instruction level parallelism,floating point arithmetic,floating point
Instruction-level parallelism,Single-precision floating-point format,Polynomial,Computer science,Very long instruction word,Parallel computing,Code generation,Theoretical computer science,Optimizing compiler,Software,IEEE floating point
Conference
Citations 
PageRank 
References 
5
0.62
9
Authors
8
Name
Order
Citations
PageRank
Claude-Pierre Jeannerod122422.05
Christophe Mouilleron2122.17
Jean-Michel Muller346666.61
Guillaume Revy4486.81
Christian Bertin550.62
Jingyan Jourdan-Lu681.38
Hervé Knochel750.62
Christophe Monat8173.47