Title
Energy aware memory architecture configuration
Abstract
In the context of battery-driven embedded systems, reducing energy while maintaining performance is one of today's challenges. The on-chip memory count for a great part of the whole system consumption, especially for images and video processing applications that make heavy use of large memory data size.In this paper, we present new technique for efficiently exploiting on-chip memory space (cache, scrathpad) for a specific application to reduce the energy consumption without loss of performance. We configure and compare the impact of three different memory architectures on the energy consumption. The first one is composed of main memory with cache, in the second architecture we find a main memory and scratchpad memory and in the last architecture we combine both cache and scratchpad with the main memory. We show the effectiveness of the last architecture and a saving about 35% in energy consumption.
Year
DOI
Venue
2005
10.1145/1101868.1101871
ACM Sigarch Computer Architecture News
Keywords
Field
DocType
energy aware memory architecture,battery-driven embedded system,on-chip memory space,large memory data size,energy consumption,whole system consumption,last architecture,different memory architecture,on-chip memory count,scratchpad memory,main memory,video processing,embedded system,chip
Registered memory,Interleaved memory,Uniform memory access,Computer science,Scratchpad memory,Parallel computing,Cache-only memory architecture,Real-time computing,Non-uniform memory access,Memory map,Memory architecture,Embedded system
Journal
Volume
Issue
ISSN
33
3
0163-5964
Citations 
PageRank 
References 
4
0.56
8
Authors
4
Name
Order
Citations
PageRank
Hanene Ben Fradj1123.46
Asmaa el Ouardighi240.56
Cécile Belleudy38412.98
Michel Auguin423835.10