Title
ShieldUS: A novel design of dynamic shielding for eliminating 3D TSV crosstalk coupling noise
Abstract
3D IC is a promising technology to meet the demands of high throughput, high scalability, and low power consumption for future generation integrated circuits. One way to implement the 3D IC is to interconnect layers of two-dimensional (2D) IC with Through-Silicon Via (TSV), which shortens the signal lengths. Unfortunately, while TSVs are bundled together as a cluster, the crosstalk coupling noise may lead to transmission errors. As a result, the working frequency of TSVs has to be lowered to avoid the errors, leading to narrower bandwidth that TSVs can provide. In this paper, we first derive the crosstalk noise model from the perspective of 3D chip and then propose ShieldUS, a runtime data-to-TSVs remapping strategy. With ShieldUS, the transition patterns of data over TSVs are observed at runtime, and relatively stable bits will be mapped to the TSVs which act as shields to protect the other bits which have more fluctuations. We evaluate the performance of ShieldUS with address lines from real benchmark traces and data lines of different similarities. The results show that ShieldUS is accurate and flexible. We further study dynamic shielding and our design of Interval Equilibration Unit (IEU) can intelligently select suitable parameters for dynamic shielding, which makes dynamic shielding practical and does not need to predefine parameters. This also improves the practicability of ShieldUS.
Year
DOI
Venue
2013
10.1109/ASPDAC.2013.6509678
ASP-DAC
Keywords
Field
DocType
transmission errors,low power consumption,integrated circuits,dynamic shielding,3d chip,shieldus,three-dimensional integrated circuits,low-power electronics,through silicon via,crosstalk,3d tsv crosstalk coupling noise,integrated circuit noise,shielding,interval equilibration unit,3d ic,2d ic,low power electronics
Electromagnetic shielding,Computer science,Electronic engineering,Bandwidth (signal processing),Three-dimensional integrated circuit,Throughput,Interconnection,Integrated circuit,Scalability,Low-power electronics
Conference
ISSN
ISBN
Citations 
2153-6961
978-1-4673-3029-9
7
PageRank 
References 
Authors
0.56
17
4
Name
Order
Citations
PageRank
Yuan-Ying Chang1243.03
Yoshi Shih-Chieh Huang2312.73
Narayanan Vijaykrishnan36955524.60
Chung-Ta King445074.71