Title
Characterizing chip-multiprocessor variability-tolerance
Abstract
Spatially-correlated intra-die process variations result in significant core-to-core frequency variations in chip-multiprocessors. An analytical model for frequency island chip-multiprocessor throughput is introduced. The improved variability-tolerance of FI-CMPs over their globally-clocked counterparts is quantified across a range of core counts and sizes under constant die area. The benefits are highest for designs consisting of many small cores, with the throughput of a globally-clocked design with 70 small cores increasing by 8.8% when per-core frequency islands are used. The small- core FI-CMP also loses only 7.2% of its nominal performance to process variations, the least among any of the designs.
Year
DOI
Venue
2008
10.1145/1391469.1391550
Anaheim, CA
Keywords
Field
DocType
analytical model,chip-multiprocessor variability-tolerance,core count,globally-clocked counterpart,significant core-to-core frequency variation,per-core frequency island,constant die area,globally-clocked design,spatially-correlated intra-die process variation,frequency island chip-multiprocessor throughput,small core,throughput,monte carlo methods,chip,correlation,logic design,process design,frequency control,fault tolerance,mathematical model,process variation,spatial correlation,displays,monte carlo analysis
Logic synthesis,Monte Carlo method,Computer science,Parallel computing,Automatic frequency control,Electronic engineering,Multiprocessing,Real-time computing,Chip,Fault tolerance,Process design,Throughput
Conference
ISSN
ISBN
Citations 
0738-100X
978-1-60558-115-6
39
PageRank 
References 
Authors
1.99
10
2
Name
Order
Citations
PageRank
Sebastian Herbert12569.83
Diana Marculescu22725223.87