Title
Coarse-Grained DRAM Power Management
Abstract
This paper presents an efficient system level power saving method for DRAM with multiple power modes. The proposed method is based on the power aware scheduling algorithm that controls DRAM modules in coarse grain in which the scheduler assigns appropriate power modes to memory banks at context switching time. The method controls the transition of multiple power modes, which is currently available technology, based on the history of gaining processor and memory bank usage of each process. The experimental results demonstrate the efficiency of the proposed schemes in multiprogramming environment.
Year
Venue
Keywords
2003
ESA'03: PROCEEDINGS OF THE INTERNATIONAL CONFERENCE ON EMBEDDED SYSTEMS AND APPLICATIONS
low power,DRAM,scheduling,power mode transition
Field
DocType
Citations 
Dram,Memory bank,Power saving,Power management,Scheduling (computing),Computer science,Computer multitasking,Embedded system,Context switch,System level
Conference
1
PageRank 
References 
Authors
0.41
10
3
Name
Order
Citations
PageRank
Jin Hwan Park1404.98
Sarah Wu220.80
Baback A. Izadi3225.65