Title | ||
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New Data Encoding Method with a Multi-Value Logic for Low Power Asynchronous Circuit Design |
Abstract | ||
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This paper presents an asynchronous encoding scheme using a MVL(Multi-Value Logic). This scheme reduces not only the number of wires but also the switching activities. It is achieved by the two proposed data encoding methods, RT/NRT(Return to Ternary/ Non Return to Ternary) encoding and hybrid ternary one. Conventional ternary encoding makes all data lines to intermediate to generate completion signal. In RT/NRT encoding, however, data lines with transferring zero do not change to intermediate value in order to reduce the switching activities. In hybrid ternary encoding, it needs only two half-swing to transfer 2-bit data. Indeed, it only needs two lines. As the results, a RT/NRT encoding shows 25% reduction in the signal transition and it achieve power reduction about 27% comparing to the conventional ternary one. In addition, a hybrid ternary encoding achieves 23% energy reduction. |
Year | DOI | Venue |
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2006 | 10.1109/ISMVL.2006.30 | ISMVL |
Keywords | Field | DocType |
hybrid ternary encoding,conventional ternary encoding,new data encoding method,conventional ternary,energy reduction,2-bit data,low power asynchronous circuit,hybrid ternary,nrt encoding,data line,multi-value logic,proposed data,asynchronous encoding scheme,logic design,asynchronous circuit,signal generators,logic circuits,encoding | Logic synthesis,Sequential logic,Pass transistor logic,Computer science,Logic optimization,Signal transition,Ternary operation,Electronic engineering,Asynchronous circuit,Encoding (memory) | Conference |
ISBN | Citations | PageRank |
0-7695-2532-6 | 1 | 0.37 |
References | Authors | |
6 | 3 |
Name | Order | Citations | PageRank |
---|---|---|---|
Eun-Ju Choi | 1 | 11 | 1.46 |
Kyoung-Rok Cho | 2 | 217 | 31.77 |
Jehoon Lee | 3 | 37 | 9.61 |