Name
Title | ||
|---|---|---|
Realtime implementation of the viterbi decoding algorithm on a high-performance microprocessor |
Abstract | ||
|---|---|---|
The complexity of the digital circuitry of the Viterbi decoder has prevented the algorithm from being fully exploited. One solution is to use a microprocessor to combat the complexity of the system. This paper presents a software implementation of the Viterbi algorithm on a high-performance microprocessor, for realtime decoding. The method implemented is based on forming a set of tables and using the internal structure of the processor for table manipulation rather than calculations. The paper gives a practical solution to the problem of memory management. The algorithm is reviewed mainly to define the necessary computational stages, with a detailed description of the software implementation of each stage. Also included is a comparison of the performance of the chosen processor with that of other processors, the results obtained showing a substantial improvement in performance over that of other microprocessor implementations published in the literature. This implementation would be suitable for low- and medium-speed data modems. |
Year | DOI | Venue |
|---|---|---|
1986 | 10.1016/0141-9331(86)90003-7 | Microprocessors and Microsystems: Embedded Hardware Design |
Keywords | Field | DocType |
microprocessors convolution Viterbi decoding algorithm | Sequential decoding,Computer science,Soft output Viterbi algorithm,Microprocessor,Parallel computing,Algorithm,Real-time computing,Memory management,Viterbi decoder,Soft-decision decoder,Decoding methods,Viterbi algorithm | Journal |
Volume | Issue | ISSN |
10 | 1 | 0141-9331 |
Citations | PageRank | References |
0 | 0.34 | 3 |
Authors | ||
2 | ||
Name | Order | Citations | PageRank |
|---|---|---|---|
| S. M. Said | 1 | 1 | 1.11 |
| K. R. Dimond | 2 | 11 | 3.86 |