Name
Abstract | ||
|---|---|---|
Since the advent of LSI technology, several schemes have evolved for the utilization of large arrays to their full potential. A common and straightforward approach involves the designer restricting himself to the equipment being designed at the moment. Faced with only a limited set of problems, it is not difficult to specify a small number of LSI array types which will efficiently complete the design. While the results are quite encouraging for specific cases, the drawbacks of any mass adoption of these techniques are obvious. This, the so-called "custom approach," would require the semiconductor manufacturer to be responsive to each customer with numerous low-output production runs of highly specialized devices. The per-unit cost to the user, for his own efforts as well as those of the manufacturer, would be quite high due to the inability to spread initial costs over many devices. In addition, the complexity of 100-gate-plus arrays is such that it is difficult to substitute one for another (with efficient results). This would severely limit the off-the-shelf capabilities of both user and manufacturer. |
Year | DOI | Venue |
|---|---|---|
1969 | 10.1145/1478559.1478568 | AFIPS Fall Joint Computing Conference |
Keywords | Field | DocType |
100-gate-plus array,semiconductor manufacturer,full potential,efficient result,universal architecture,straightforward approach,custom approach,large array,initial cost,lsi technology,lsi array type,computer storage devices,standardization,limit set,systems engineering,logic design,semiconductor manufacturing | Logic synthesis,Architecture,Software engineering,Computer science,Computer data storage,Real-time computing,Computer design,Standardization,Distributed computing | Conference |
Citations | PageRank | References |
1 | 0.41 | 3 |
Authors | ||
2 | ||
Name | Order | Citations | PageRank |
|---|---|---|---|
| F. D. Erwin | 1 | 2 | 0.96 |
| J. F. McKevitt | 2 | 1 | 0.41 |