Abstract | ||
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There are situations in a computing system where incoming information needs to be compared with a piece of stored data to locate the matching entry, e.g., cache tag array lookup and translation look-aside buffer matching. If the stored data is protected with error-correcting codes (ECC) for reliability reason, the previous solution is to access the stored information, decode and correct if necessary before it is used to compare with the incoming data. The decoding and correcting step increases the total access time, which is often critical. In this paper, we propose a method to improve the compare latency for information encoded with ECC. We use the cache tag array look-up as an example, and results show that 30% gate count reduction and 12% latency reduction are achieved. |
Year | DOI | Venue |
---|---|---|
2012 | 10.1109/TVLSI.2011.2169094 | IEEE Trans. VLSI Syst. |
Keywords | Field | DocType |
gate count reduction,matching entry,cache tag array lookup,latency reduction,computing system,total access time,cache tag array look-up,incoming data,error-correcting code,translation look-aside buffer matching,incoming information,adders,decoding,hamming distance,logic gates,radiation detectors | Hamming code,Gate count,Access time,Computer science,Cache,Cache algorithms,Hamming distance,Linear code,Decoding methods,Computer hardware | Journal |
Volume | Issue | ISSN |
20 | 11 | 1063-8210 |
Citations | PageRank | References |
1 | 0.41 | 4 |
Authors | ||
3 |
Name | Order | Citations | PageRank |
---|---|---|---|
Wu Wei | 1 | 204 | 14.84 |
Dinesh Somasekhar | 2 | 231 | 44.52 |
Shih-Lien Lu | 3 | 958 | 67.34 |