Title
Automatic code generation for executing tiled nested loops onto parallel architectures
Abstract
This paper presents a novel approach for the problem of generating tiled code for nested for-loops using a tiling transformation. Tiling or supernode transformation has been widely used to improve locality in multi-level memory hierarchies as well as to efficiently execute loops onto non-uniform memory access architectures. However, automatic code generation for tiled loops can be a very complex compiler work due to non-rectangular tile shapes and iteration space bounds. Our method considerably enhances previous work on rewriting tiled loops by considering parallelepiped tiles and arbitrary iteration space shapes. The complexity of code generation for tiling transformation is now reduced to the complexity of code generation for any linear transformation. Experimental results which compare all so far presented approaches, show that the proposed approach for generating tiled code is significantly accelerated.
Year
DOI
Venue
2002
10.1145/508791.508961
SAC
Keywords
Field
DocType
code generation,loop tiling,linear transformation,non uniform memory access,nested loops,hermite normal form
Locality,Fourier–Motzkin elimination,Computer science,Parallel computing,Code generation,Compiler,Loop tiling,Rewriting,Supernode,Nested loop join
Conference
ISBN
Citations 
PageRank 
1-58113-445-2
6
0.60
References 
Authors
10
3
Name
Order
Citations
PageRank
Georgios Goumas126822.03
Maria Athanasaki2645.80
N. Koziris31015107.53