Name
Title | ||
|---|---|---|
Low-Voltage Low-Power Highly Linear Down-Sampling Mixer in 65nm Digital CMOS Technology |
Abstract | ||
|---|---|---|
A highly linear down-conversion mixer in a 65 nm digital CMOS technology is presented. The mixer was fabricated in a tripple-well process which allows to use the bulk of NMOS transistors as inputs. In contrary to other works not the gate but the bulk connector is used for the input signal. A high IIP3 of +18 dBm was achieved with a power consumption of only 0.67 mW from a 1.2 V supply voltage. The mixer has a measured ldB compression point of +7 dBm. The input signal bandwidth lies beyond 2 GHz. |
Year | DOI | Venue |
|---|---|---|
2008 | 10.1109/DDECS.2008.4538780 | Bratislava |
Keywords | Field | DocType |
low-voltage low-power highly linear,bulk connector,linear down-conversion mixer,compression point,tripple-well process,input signal,input signal bandwidth,nmos transistor,power consumption,supply voltage,digital cmos technology,down-sampling mixer,radio frequency,voltage,low voltage,transceivers,cmos technology,mobile communication | NMOS logic,Computer science,Voltage,CMOS,Electronic engineering,Bandwidth (signal processing),Low voltage,MOSFET,Transistor,Electrical engineering,Frequency mixer | Conference |
ISSN | ISBN | Citations |
2334-3133 | 978-1-4244-2277-7 | 1 |
PageRank | References | Authors |
0.48 | 5 | 2 |
Name | Order | Citations | PageRank |
|---|---|---|---|
| Kurt Schweiger | 1 | 13 | 3.74 |
| H. Zimmermann | 2 | 57 | 15.95 |