Abstract | ||
---|---|---|
A novel ultra-low power operating technique is presented for mega-pixels current-mediated CMOS imagers. In the proposed technique, the reset and read-out phases occur simultaneously: as a single pixel is being read-out another pixel is being reset. Such a strategy reduces power consumption by more than 2 orders of magnitude for current- mediated mega-pixels CMOS imagers, while still allowing for on-read-out fixed pattern noise correction. Power consumption becomes independent of both read-out speed and imager array size. Additionally, the proposed operating technique leads to improved linearity for the pixel response, increased dynamic range as well as on-chip digital shutter functionality. A single additional address decoder is required to generate the reset signals, resulting in a marginal increase in silicon area. The wiring overhead is kept to a minimum with only a single control signal required to operate the current- mediated CMOS imager. |
Year | DOI | Venue |
---|---|---|
2004 | 10.1109/TCE.2004.1277840 | IEEE Trans. Consumer Electronics |
Keywords | Field | DocType |
proposed operating technique,mediated cmos imager,read-out speed,pixel response,proposed technique,read-out phase,mega-pixels current-mediated cmos imagers,mediated mega-pixels cmos imagers,power consumption,ultra-low power operating technique,novel ultra-low power operating,silicon,circuits,chip,low power electronics,switches,mathematics,dynamic range,signal generators,decoding,indexing terms,pixel | Fixed-pattern noise,Dynamic range,Computer science,Linearity,Shutter,Electronic engineering,CMOS,Pixel,Electrical engineering,Address decoder,Low-power electronics | Journal |
Volume | Issue | ISSN |
50 | 1 | 0098-3063 |
Citations | PageRank | References |
5 | 0.67 | 3 |
Authors | ||
3 |
Name | Order | Citations | PageRank |
---|---|---|---|
F. Boussaid | 1 | 6 | 1.08 |
A. Bermak | 2 | 35 | 4.72 |
A. Bouzerdoum | 3 | 57 | 8.84 |