Name
Title | ||
|---|---|---|
Hardware Software Co-Design Of H.264 Baseline Encoder On Coarse-Grained Dynamically Reconfigurable Computing System-On-Chip |
Abstract | ||
|---|---|---|
REMUS-II (REconfigurable MUltimedia System 2) is a coarse-grained dynamically reconfigurable computing system for multimedia and communication baseband processing. This paper proposes a real-time H.264 baseline profile encoder on REMUS-II. First, we propose an overall mapping flow for mapping algorithms onto the platform of REMUS-II system and then illustrate it by implementing the H.264 encoder. Second, parallel and pipelining techniques are considered for fully exploiting the abundant computing resources of REMUS-II, thus increasing total computing throughput and solving high computational complexity of H.264 encoder. Besides, some data-reuse schemes are also used to increase data-reuse ratio and therefore reduce the required data bandwidth. Third, we propose a scheduling scheme to manage run-time reconfiguration of the system. The scheduling is also responsible for synchronizing the data communication between tasks and handling conflict between hardware resources. Experimental results prove that the REMUS-MB (REMUS-II version for mobile applications) system can perform a real-time H.264/AVC baseline profile encoder. The encoder can encode CTF@30 fps video sequences with two reference frames and maximum search range of [-16,15]. The implementation, thereby, can be applied to handheld devices targeted at mobile multimedia applications. The platform of REMUS-MB system is designed and synthesized by using TSMC 65 nm low power technology. The die size of REMUS-MB is 13.97 mm(2). REMUS-MB consumes, on average, about 100 mW while working at 166 MHz. To my knowledge, in the literature this is the first implementation of H.264 encoding algorithm on a coarse-grained dynamically reconfigurable computing system. |
Year | DOI | Venue |
|---|---|---|
2013 | 10.1587/transinf.E96.D.601 | IEICE TRANSACTIONS ON INFORMATION AND SYSTEMS |
Keywords | Field | DocType |
reconfigurable computing, reconfigurable multimedia system, REMUS-II, coarse-grained dynamically reconfigurable architecture, H.264/AVC encoder | Computer architecture,Co-design,System on a chip,Computer science,Encoder,Hardware software,Reconfigurable computing | Journal |
Volume | Issue | ISSN |
E96D | 3 | 1745-1361 |
Citations | PageRank | References |
1 | 0.36 | 13 |
Authors | ||
8 | ||
Name | Order | Citations | PageRank |
|---|---|---|---|
| Hung K. Nguyen | 1 | 1 | 0.36 |
| peng cao | 2 | 33 | 4.96 |
| Xuexiang Wang | 3 | 3 | 1.55 |
| Jun Yang | 4 | 147 | 36.54 |
| Longxing Shi | 5 | 116 | 39.08 |
| Min Zhu | 6 | 1 | 0.36 |
| leibo liu | 7 | 816 | 116.95 |
| Shaojun Wei | 8 | 555 | 102.32 |